Keysight N4877A Clock Data Recovery Demultiplexer
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Keysight N4877A Clock Data Recovery and Demultiplexer operates from 50 Mb/s to 32 Gb/s with tunable loop bandwidth and 100 fs rms jitter for BER testing.
Product details
| Model | N4877A |
| Manufacturer | Keysight |
| Category | Bit Error Rate Testing |
| Availability | Made to order |
Description
Overview
The N4877A is a clock data recovery (CDR) and demultiplexer designed for testing high-speed serial devices. It operates across a wide range from 50 Mb/s to 32 Gb/s, providing important headroom for emerging standards and existing applications. The built-in 1:2 demultiplexer enables economical receiver testing with Keysight BERT instruments for data rates above 12.5 Gb/s.
Key Features
- Operating range from 50 Mb/s to 32 Gb/s with optional 16G version to 16.5 Gb/s
- Tunable loop bandwidth up to 20 MHz with selectable peaking
- Clock and auxiliary clock output with residual jitter as low as 100 fs rms
- Built-in 1:2 demultiplexer for subrate testing
- High sensitivity input for small signal detection
- Graphical user interface via USB connection
Applications
- 100GbE receiver characterization
- 32GFC and 16GFC Fibre Channel testing
- Computer standards: USB 3.0, SATA, SAS, PCIe including PCIe gen4
- Clock recovery from data streams when clock signals unavailable
- Clock clean-up and jitter reduction for precision measurements
Specifications
| Characterize Next-Generation Receivers and Transmitters | The N4877A Clock Data Recovery is designed to operate over from 50 Mb/s to 32 Gb/s. The wide data rate range allows testing of emerging standards like 100GbE and 32GFC while covering existing lower speed standards. The 16G option operating up to 16.5 Gb/s is ideal for 16GFC as well as computer standards like USB 3.0, SATA, SAS and PCIe including PCIe gen4. |
| Recover Clocks or Clean-Up Clocks | The N4877A provides necessary clock signals for BERTs or oscilloscopes when access to appropriate clock signals from the device under test (DUT) is not possible. The N4877A recovers clocks from data streams if a clock is not available or can act as clean-up PLL for existing clocks with excessive intrinsic jitter to allow accurate measurements. |
| Simplify Receiver Testing of high speed Devices | The N4877A Clock Data Recovery and Demultiplexer 1:2 is the counterpart to the N4876A Multiplexer 2:1 and complements Keysight's J-BERT and ParBERT based receiver test solutions for data rates between 12.5 Gb/s and 28.4 Gb/s. |
| Features | Parameters |
| Power Consumption | 100–240 V, ~50/60 Hz, 90 VA, max |
| Operating Temperature | 10 to 40 °C |
| Storage Temperature | –40 to 70 °C |
| Operating humidity | 95% relative humidity, non-condensing |
| Storage Humidity | 50% relative humidity |
| Connectors Rear Panel | USB; LAN; IEC power connector |
| Rack Mount without Bumper | 1/2 x 19“ width, 1U height: 213 x 44.5 x 360 mm (8.4 x 1.8 x 14.2 in) |
| Weight Net | 2.9 kg (6.4 lb) |
| Weight Shipping | 5.5 kg (12.1 lb) |
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Keysight N4877A Clock Data Recovery Demultiplexer
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